dr. D.M. Farley

Postdoc
Electronic Components, Technology and Materials (ECTM), Department of Microelectronics

Expertise: Electronics reliability

Themes: Micro/Nano System Integration and Reliability

Biography

Dan Farley was born on one coast of the USA and grew up on the other. He earned his BSME (bachelor of science in mechanical engineering) from Syracuse University in 1999, with a minor in Mathematics. He then joined New Venture Gear in East Syracuse as a Product Engineer, overseeing the development of Chrysler transaxles. After a year at NVG he moved back to Buffalo, NY as a Design Engineer for a material handling company, designing crane systems focusing on stress analysis in finite element software. The New York state's declining economy claimed that company as it went out of business, and he soon found a job as a Project Engineer at the petrochemical company, UOP LLC. Late in 2002, Dan decided to take his life in a more academic direction and joined the University of Maryland's combined masters/PhD program, at the CALCE Institute, under Prof. Abhijit Dasgupta. There, his research was primarily funded directly by Philips AppTech, focusing first on the reliability and durability of conductive adhesive technology. Halfway through his graduate school career, research interests (and money) changed paths to the many issues in the reliability System-in-Package, where his thesis topic was on the development of fatigue models for the copper traces on PWAs. During this time he interned at Dell Portables Reliability and Philips Hi Tech Campus in Eindhoven. He received his PhD on Electronics Packaging in 2010. After his post-doc contract with TUD he hopes to obtain employment in the EU to continue work on electronics reliability.

Projects history

Solid State Lighting reliability for automotive application

The use of SiPs in all kinds of applications is only possible if its reliability can be qualified

  1. An adaptive Cu trace fatigue model based on average cross-section strain
    D. Farley; Y. Zhou; A. Dasgupta; and J.W.C. De Vries;
    Microelectronics Reliability,
    Volume 52, Issue 11, pp. 2763-2772, 2012. DOI 10.1016/j.microrel.2012.06.114.

  2. Simulation and qualification of a system-in-package (SiP) based solid state lighting (SSL) module
    D.M. Farley; F. Boschman; J.E. Bullema; A.W.J. Gielen; P. Hesen; J.P.H.M. Krugers; F. Swartjes; H.W. van Zeijl; GuoQi Zhang;
    In Proc. 13th International Conference on Thermal, Mechanical and Multi-Physics Simulation and Experiments Microelectronics and Microsystems (EuroSimE 2012),
    Cascais, Portugal, pp. 1-3, Apr 2012. ISBN 978-1-4673-1511-1; DOI 10.1109/ESimE.2012.6191780.

  3. Fatigue model based on average cross-section strain of Cu trace cyclic bending
    D.M. Farley; A. Dasgupta; Y. Zhou; J.F.J Caers; J.W.C. de Vries;
    In 12th Internat. Conf. on Thermal, Mechanical and Multi-Physics Simulation and Experiments Microelectronics and Microsystems (EuroSimE 2011),
    Linz, Austria, pp. 1-10, Apr. 2011. ISBN 978-1-4577-0106-1; DOI 10.1109/ESIME.2011.5765858.

  4. Copper trace fatigue models for mechanical cycling, vibration and shock/drop of high-density PWAs
    D. Farley; Y. Zhou; F. Askari; M. Al-Bassyiouni; A. Dasgupta; J. Caers; J. DeVries;
    Microelectronics Reliability,
    Volume 50, pp. 937-947, Jul. 2010.

  5. Copper Trace Fatigue Models for Mechanical Cycling, Vibration and Shock/Drop of High-Density PWAs
    D. Farley; Y. Zhou; F. Askari; M. Al-Bassyiouni; A. Dasgupta; J. F. J. Caers; J. W. C. DeVries;
    In EuroSimE 2009, Proceedings of the 10th International Conference on,
    2009.
    document

  6. Cold Welding: A New Factor Governing the Robustness of Adhesively Bonded Flip-Chip Interconnects
    D. Farley; T. Kahnert; K. Sinha; S. Solares; A. Dasgupta; J.F.J. Caers; X.J. Zhao;
    In ECTC 2009, The 59th Electronics Components and Technology Conference,
    2009.
    document

  7. Mechanics of Adhesively Bonded Flip-Chip-on-Flex Assemblies. Part II: Effect of Bump Coplanarity on Manufacturability and Durability of Non-Conducting Adhesive Assemblies
    D. Farley; A. Dasgupta; J. Caers;
    Journal of Adhesion Science and Technology,
    Volume 22, pp. 1757-1780, Sep. 2008.

  8. Mechanics of Adhesively Bonded Flip-Chip-on-Flex Assemblies. Part I: Durability of Anisotropically Conductive Adhesive Interconnects
    J. Haase; D. Farley; P. Iyer; P. Baumgartner; A. Dasgupta; J.F.J. Caers;
    Journal of Adhesion Science and Technology,
    Volume 22, pp. 1733-1756, 2008.

  9. Qualification of SiP Products: Quasi-Static Cyclic Mechanical Bending
    D. Farley; Y. Zhou; A. Dasgupta; J. F. J. Caers; J. W. C. De Vries;
    In Proceedings of the 2007 ASME International Mechanical Engineering Congress and Exposition Seattle,
    Washington, USA, 2007.

  10. Guidelines for Transient Modelling of Board Level Drop Tests
    J. Varghese; G. Sobue; D. Farley; G. Freitas; A. Dasgupta;
    In Proceedings of the NAFEMS World Conf.,
    2007.

  11. Qualification Of A System-in-Package (SiP): A Physics-of-Failure (PoF) Perspective
    D. Farley; A. Dasgupta; J. Caers;
    In ASME International Mechanical Engineering Congress and Exposition,
    Chicago, Illinois, USA, 2006.
    document

  12. Characterizing Non-Conductive Adhesives using Finite Element Analysis: Residual Stress Determination
    D. Farley; A. Dasgupta; J. F. J. M. Caers;
    In Society of Experimental Mechanics Annual Conference & Exposition,
    Portland, OR, USA, 2005.
    document

  13. Characterization of non-conductive adhesives
    D. Farley; A. Dasgupta; J. F. J. M. Caers;
    In ASME InterPACK2005, Proceedings of,
    San Francisco, California, USA, pp. 471-477, 2005.
    document

  14. Characterization of Anisotropic Conductive Adhesives
    P. Iyer; P. Baumgaertner; D. Farley; A. Dasgupta;
    In ASME International Mechanical Engineering Congress and RD&D Expo,
    Washington, DC, USA, 2003.

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Last updated: 16 Jun 2014

Daniel Farley

Alumnus