Ultra-Low Power TMR Sensing IC for Next-Generation Industrial IoT

The transition towards smarter industrial automation and electric mobility requires sensors that are not only highly accurate but also extremely power-efficient. Tunnel Magnetoresistance (TMR) technology has emerged as a superior alternative to traditional Hall-effect or AMR sensors. TMR sensors offer a significantly higher resistance change (TMR ratio), which translates to higher sensitivity, lower noise floors, and—most importantly—micro-watt power consumption.

The Project Goal:

In this project, we will design a high-precision readout IC that interfaces with a TMR bridge. We will investigate architectures such as chopper-stabilized amplifiers or zoom-ADCs to handle the sensor's high output impedance while maintaining a high dynamic range.

Assignment

Literature Review: Analyze the state-of-the-art in TMR interface circuits and magnetic field compensation techniques.

Architecture Exploration: Propose an IC architecture that addresses TMR-specific challenges, such as non-linearity and temperature drift.

Circuit Implementation: Design the analog front-end (AFE) and a suitable ADC in a modern CMOS process (e.g., 180nm or 65nm).

Verification: Perform extensive post-layout simulations to ensure robustness against process variations (PVT).

Tapeout : If the design meets performance criteria, the student will be supported through the chip fabrication process.

Requirements

You are an ambitious master student with good analog circuit design knowledge and high motivation. You should have obtained good grades from the following courses: Measurement and instrumentation, Analog circuit design fundamentals, CMOS I/II,

Contact

Last modified: 2026-02-04