dr. Y. Civale

PhD student
Electronic Components, Technology and Materials (ECTM), Department of Microelectronics

PhD thesis (Nov 2008): Aluminum-Mediated Selective Solid-Phase Epitaxy of High-Quality Silicon Diodes
Promotor: Lis Nanver

Expertise: Shallow junction formation and Si-based nanoscale devices

Biography

Yann Civale was born in France, in 1979. In December 2003, he received his Master degree from the Ecole Nationale Superieure de Physique de Marseille, after completing his master thesis with Philips Research, Eindhoven, on the fabrication, characterization and substrate-transfer-assisted-optimization of Si-based thermoelectric micro-generators. In January 2004, he joined the Delft University of Technology where he worked on his PhD degree within the Laboratory of Electronic Components Technology and Materials, DIMES. His research interest includes shallow junction formation and Si-based nanoscale devices. Since 2008, dr. Civale is with IMEC, Belgium.

Publications

  1. Ultra-high aspect ratio FinFET technology.
    V. Jovanovic; T. Suligoj; M. Poljak; Y. Civale; L.K. Nanver;
    Solid-state electronics,
    Volume 54, Issue 9, pp. 870-876, 2010.

  2. Al-mediated Solid-Phase Epitaxy of Silicon-On-Insulator
    Agata Sakic; Yann Civale; Lis K. Nanver; Cleber Biasotto; Vladimir Jovanovic;
    In MRS Spring Meeting Symposium A: Amorphous and Polycrystalline Thin-Film Silicon Science and Technology,
    San Francisco, Apr. 2010.

  3. On the Mechanisms Governing Aluminum-Mediated Solid-Phase Epitaxy of Silicon
    Y. Civale; G. Vastola; L.K. Nanver; R. Mary-Joy; J.R. Kim;
    Journal of electronic materials,
    Volume 38, Issue 10, pp. 2052-2062, 2009.

  4. 1.9 nm Wide Ultra-High Aspect-Ratio Bulk-Si FinFETs
    V. Jovanovic; M. Poljak; T. Suligoj; Y. Civale; L.K. Nanver;
    In Proc. 67th IEEE Device Research Conference, DRC 2009,
    2009.

  5. Accurate SIMS doping profiling of aluminum-doped solid-phase epitaxy silicon islands
    Y. Civale; L.K. Nanver; S.G. Alberici; A. Gammon; I. Kelly;
    Electrochemical and Solid-State Letters,
    Volume 11, Issue 4, pp. H74-H76, 2008.

  6. Evaluation of Al-doped SPE ultrashallow P+N Junctions for use as PNP SiGe HBT Emitters
    Yann Civale; Gianpaolo Lorito; Cuiqin Xu; Lis K. Nanver; Ramses van der Toorn;
    In Proceedings of IEEE International Workshop on Junction Technology (IWJT 2008),
    Shanghai, China, pp. 97-100, May 2008.
    document

  7. Ultra-low-temperature process modules for back-wafer-contacted silicon-on-glass RF/microwave technology
    L.K. Nanver; V. Gonda; Y. Civale; T.L.M. Scholtes; L. La Spina; H. Schellevis G. Lorito; F. Sarubbi; M. Popadic; K. Buisman; S. Milosavljevic; E.J.G. Goudena;
    In Proceedings of 9th International Conference on Solid-State and Integrated Circuit Technology (ICSICT 2008),
    Beijing, China, pp. 1184-1187, Oct. 2008.

  8. On the Aluminum-Mediated Solid-Phase Epitaxy of Silicon at 300C
    A. Sammak; Y. Civale; L. K. Nanver;
    In Proc. 11th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors (SAFE),
    Veldhoven, The Netherlands, Nov. 2008.

  9. Aluminum-mediated selective solid-phase epitaxy of high-quality silicon diodes
    Y. Civale;
    PhD thesis, Delft University of Technology, Nov. 2008. ISBN 978-90-9023633-9; Promotor: prof. L.K. Nanver.
    document

  10. Silicon Dioxide Contact Window Disfiguration Due to Oxide Decomposition During the Baking Step
    M. Popadic; L. K. Nanver; Y. Civale;
    In Proceedings of 10th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors,
    Veldhoven, The Netherlands, 2007. ISBN 978-90-73461-49-9.

  11. Electrical Characterization of Layer-Exchange Solid-Phase Epitaxy Si Diode Junctions
    Y. Civale; R. Mary-Joy; L. K. Nanver;
    In Proc. 10th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors,
    Veldhoven, The Netherlands, pp. 408-411, 2007. ISBN 978-90-73461-49-9.

  12. Sub-500C Solid-Phase Epitaxy of Ultra-Abrupt p+-Silicon Elevated Contacts and Diodes
    Y. Civale; L.K. Nanver; P. Hadley; E.J.G. Goudena; H. Schellevis;
    IEEE Electron Device Lett,
    Volume 27, Issue 5, pp. 341-343, May 2006. ISSN 0741-3106.

  13. Low-Temperature Solid-Phase Epitaxy of Defect-Free Aluminum p+-doped Silicon for Nanoscale Device Applications
    Y. Civale; L.K. Nanver; P. Hadley; H.W. van Zeijl; E.J.G. Goudena; H. Schellevis;
    In Material Research Society Symposium Proc.,
    San Francisco, CA, 2006.
    document

  14. Selective Solid-Phase Epitaxy of Ultra-Shallow p+ Aluminum-Doped Silicon Junctions for Integration in Nanodevices
    Y. Civale; L.K. Nanver; P. Hadley;
    In IEEE Silicon Nanoelectronics Workshop Proceedings,
    Honolulu, USA, pp. 55-56, Jun. 2006.
    document

  15. Material-Inversion Solid-Phase Epitaxy of p+ Si for Elevated Junctions
    Y. Civale; L. K. Nanver; H. Schellevis;
    In Electrochemical Society Transactions, 210th ECS Meeting Proceedings,
    Cancun, Mexico, pp. 97-103, Oct. 2006.

  16. Fabrication and numerical analysis of nanoscale silicon pillars for IC applications
    Y. Civale; P. Hadley; L. K. Nanver; E. J. G. Goudena; J. Slabbekoorn;
    In Proceedings of 8th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE,
    Veldhoven, The Netherlands, pp. 79-82, 2005.
    document

  17. Aspects of Silicon Nanowire Synthesis by Aluminum-Catalyzed Vapor-Liquid-Solid Mechanism
    Y. Civale; L.K. Nanver; P. Hadley; E.J.G. Goudena;
    In Proceedings of 7th Annual Workshop on Semiconductor Advances for Future Electronics and Sensors, SAFE, Veldhoven,
    The Netherlands, pp. 692-696, 2004.

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Last updated: 16 Jun 2014

Yann Civale

Alumnus