dr. Huajun Zhang
Electronic Components, Technology and Materials (ECTM), Department of Microelectronics Themes: Analog and power integrated circuit design (APIC)
Biography
Huajun Zhang received the B.E. degree in electrical and computer engineering from Shanghai Jiao Tong University, Shanghai, China, in 2015, and the B.S.E. and M.S. degrees in electrical engineering from the University of Michigan, Ann Arbor, MI, U.S.A., in 2015 and 2017, respectively. He is currently a postdoc researcher with the Electronic Components, Technology and Materials (ECTM) group at Delft University of Technology, The Netherlands.
In summer 2016, he was an Analog/Mixed-Signal Design Intern with Analog Devices, Inc., Wilmington, MA, U.S.A. From May 2017 to February 2019, he was a Mixed Signal Design Engineer with Analog Devices, Inc., Norwood, MA, U.S.A. He joined the Electronic Instrumentation Laboratory at Delft University of Technology, in March 2019, as a Ph.D. candidate. His technical interests include low-power and precision analog signal chains, Class-D audio amplifiers, and integrated power electronics in GaN.
Mr. Zhang received the IEEE Solid-State Circuits Society Predoctoral Achievement Award in 2023, the Analog Devices Outstanding Student Designer Award in 2022, and the ESSCIRC Best Student Paper Award in 2021. He has served as a Reviewer for the IEEE Open Journal of the Solid-State Circuits Society, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS I: REGULAR PAPERS, IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS II: Express Briefs, Electronics Letters, and the IEEE SENSORS JOURNAL.
Publications
- A -121.5-dB THD Class-D Audio Amplifier With 49-dB LC Filter Nonlinearity Suppression
Huajun Zhang; Marco Berkhout; Kofi A. A. Makinwa; Qinwen Fan;
{IEEE} Journal of Solid-State Circuits,
Volume 57, Issue 4, pp. 1153--1161, April 2022. DOI: 10.1109/jssc.2021.3125526
document - A 4-$\upmu$W Bandwidth/Power Scalable Delta\textendashSigma Modulator Based on Swing-Enhanced Floating Inverter Amplifiers
Menglian Zhao; Yibo Zhao; Huajun Zhang; Yaopeng Hu; Yuanxin Bao; Le Ye; Wanyuan Qu; Zhichao Tan;
{IEEE} Journal of Solid-State Circuits,
Volume 57, Issue 3, pp. 709-718, March 2022. DOI: 10.1109/jssc.2021.3123261
document - A 121.4-dB DR Capacitively Coupled Chopper Class-D Audio Amplifier
Huajun Zhang; Marco Berkhout; Kofi A. A. Makinwa; Qinwen Fan;
{IEEE} Journal of Solid-State Circuits,
Volume 57, Issue 12, pp. 3736--3745, December 2022. DOI: 10.1109/jssc.2022.3207907
document - A Chopper Class-D Amplifier for PSRR Improvement Over the Entire Audio Band
Huajun Zhang; Nuriel N. M. Rozsa; Marco Berkhout; Qinwen Fan;
{IEEE} Journal of Solid-State Circuits,
Volume 57, Issue 7, pp. 2035--2044, July 2022. DOI: 10.1109/jssc.2022.3161136
document - A -121.5-dB THD Class-D Audio Amplifier With 49-dB LC Filter Nonlinearity Suppression
Huajun Zhang; Marco Berkhout; Kofi A. A. Makinwa; Qinwen Fan;
{IEEE} Journal of Solid-State Circuits,
Volume 57, Issue 4, pp. 1153--1161, April 2022. DOI: 10.1109/jssc.2021.3125526
document - A 121.4dB DR, -109.8dB THD+N Capacitively-Coupled Chopper Class-D Audio Amplifier
Huajun Zhang; Marco Berkhout; Kofi A. A. Makinwa; Qinwen Fan;
In Fujino, {Laura C. } (Ed.), 2022 IEEE International Solid- State Circuits Conference (ISSCC),
United States, IEEE, pp. 484--486, 2022. Green Open Access added to TU Delft Institutional Repository 'You share, we take care!' - Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher is the copyright holder of this wo. DOI: 10.1109/ISSCC42614.2022.9731737
Abstract: ...
Class-D amplifiers (CDAs) are often used in audio applications due to their superior power efficiency. Due to the sensitivity of the human ear, a large dynamic range (DR) is desired, and audio DACs with up to 130dB DR are commercially available [1]. However, the DR of the CDAs they drive is typically much lower [2]-[4], mainly due to the thermal noise introduced by the input resistors of their resistive feedback networks. Reducing this resistance is difficult, as it reduces the CDA's input impedance and increases the required loop-filter capacitance. Alternatively, the CDA could be configured as a capacitively coupled chopper amplifier (CCCA), whose capacitive feedback network could then achieve low noise without reducing input impedance. However, the large PWM component present at its output would then saturate its input stage. By exploiting the inherent PWM filtering present in a feedback-after-LC architecture, this paper presents a capacitively coupled chopper CDA, resulting in significantly improved DR and THD+N. The prototype achieves 8V_RMS of integrated output noise (A-weighted), a 121.4dB DR, and -1 09.8dB THD+N while delivering a maximum of 15/26W into an 8/4Omega load with 93%/88% efficiency. - Power-Efficiency Evolution of Capacitive Sensor Interfaces
Zhichao Tan; Hui Jiang; Huajun Zhang; Xiyuan Tang; Haoming Xin; Stoyan Nihtianov;
{IEEE} Sensors Journal,
Volume 21, Issue 11, pp. 12457--12468, June 2021. DOI: 10.1109/jsen.2020.3035109
document - A High-Linearity and Low-EMI Multilevel Class-D Amplifier
Huajun Zhang; Shoubhik Karmakar; Lucien J. Breems; Quino Sandifort; Marco Berkhout; Kofi A. A. Makinwa; Qinwen Fan;
{IEEE} Journal of Solid-State Circuits,
Volume 56, Issue 4, pp. 1176--1185, April 2021. DOI: 10.1109/jssc.2020.3043815
document - A -109.1 dB/-98 dB THD/THD+N Chopper Class-D Amplifier with >83.7 dB PSRR Over the Entire Audio Band
Huajun Zhang; Nuriel Rozsa; Marco Berkhout; Qinwen Fan;
In ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC),
United States, IEEE, pp. 395--398, 2021. Accepted author manuscript; ESSCIRC 2021 : IEEE 47th European Solid State Circuits Conference ; Conference date: 06-09-2021 Through 09-09-2021. DOI: 10.1109/ESSCIRC53450.2021.9567786
Keywords: ...
Class-D amplifier, PSRR, PWM, chopping, intermodulation.
Abstract: ...
This paper reports a chopper Class-D audio amplifier that obtains high PSRR over the entire audio band. A chopping scheme is proposed to minimize intermodulation distortion between pulse-width modulation (PWM) and chopping in the audio band. A high-voltage chopper is developed to handle a 14.4 V PWM signal. Timing matching techniques are proposed to minimize chopping nonidealities which ensure good PSRR and THD. Fabricated in a 180nm BCD process, the prototype obtains a PSRR >109 dB at 217 Hz and >83.7 dB over the entire audio band. It also achieves -109.1 dB/-98 dB THD/THD+N and can deliver a maximum of 13 W to an 8-Ω load. - A 94.1 dB DR 4.1 nW/Hz Bandwidth/Power Scalable DTDSM for IoT Sensing Applications Based on Swing-Enhanced Floating Inverter Amplifiers
Yibo Zhao; Huajun Zhang; Yaopeng Hu; Yuanxin Bao; Le Ye; Wanyuan Qu; Menglian Zhao; Zhichao Tan;
In 2021 IEEE Custom Integrated Circuits Conference, CICC 2021 - Proceedings,
United States, Institute of Electrical and Electronics Engineers (IEEE), 2021. 2021 IEEE Custom Integrated Circuits Conference, CICC 2021 ; Conference date: 25-04-2021 Through 30-04-2021. DOI: 10.1109/CICC51472.2021.9431415
Abstract: ...
IoT sensing applications operating from batteries or harvested energy require microwatt data converters. To accurately measure small signals, they often need to achieve a high DR (>90dB) and better linearity than the transducers themselves (>14b) with a BW in the kHz range. IoT systems also often consist of multiple sensing modalities with different BW requirements and are often heavily duty-cycled to reduce power consumption. This paper presents a fully dynamic discrete-time delta-sigma modulator (DTDSM) that supports 4x bandwidth/power scaling without any programming overhead except for changing fs, using a capacitively biased swing-enhanced floating inverter amplifier (SEFIA). The prototype, fabricated in 180nm CMOS, consumes only 4μW at 800Hz BW and achieves >87dB SNDR over 2 octaves of fs, between 100 kHz and 400 kHz, and a DR of 94.1 dB while operating with an OSR of 125. - A-121.5 dB THD Class-D Audio Amplifier with 49 dB Suppression of LC Filter Nonlinearity and Robust to +/-30% LC Filter Spread
Huajun Zhang; Marco Berkhout; Kofi Makinwa; Qinwen Fan;
In 2021 Symposium on VLSI Circuits,
United States, IEEE, 2021. Green Open Access added to TU Delft Institutional Repository {\textquoteleft}You share, we take care!{\textquoteright} – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher i. DOI: 10.23919/VLSICircuits52068.2021.9492441
Abstract: ...
This paper reports a Class-D audio amplifier that uses multiloop feedback to suppress output LC filter nonlinearity by 49 dB, enabling the use of small, low-cost LC filters with ±30% spread while maintaining low distortion. Fabricated in a 180 nm BCD process, the prototype achieves a THD of-121.5 dB and a THD+N of-107.1 dB. It delivers 12W/21W into an 8-Ω/4-Ω load with 91%/87% efficiency. - A 28-W, -102.2-dB THD$\mathplus$N Class-D Amplifier Using a Hybrid $\upDelta$$\upSigma$M-PWM Scheme
Shoubhik Karmakar; Huajun Zhang; Robert van Veldhoven; Lucien J. Breems; Marco Berkhout; Qinwen Fan; Kofi A. A. Makinwa;
{IEEE} Journal of Solid-State Circuits,
Volume 55, Issue 12, pp. 3146--3156, December 2020. DOI: 10.1109/jssc.2020.3023874
document - A -107.8 dB THD+N Low-EMI Multi-Level Class-D Audio Amplifier
Huajun Zhang; Shoubhik Karmakar; Lucien Breems; Quino Sandifort; Marco Berkhout; Kofi Makinwa; Qinwen Fan;
In 2020 IEEE Symposium on VLSI Circuits,
United States, IEEE, pp. 1--2, 2020. Green Open Access added to TU Delft Institutional Repository {\textquoteleft}You share, we take care!{\textquoteright} – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher i. DOI: 10.1109/VLSICircuits18222.2020.9162793
Abstract: ...
This paper describes a class-D audio amplifier with a multilevel output stage that reduces both EMI and idle power. High loop gain, and thus high linearity, are enabled by a relatively high (4.2 MHz) switching frequency, which relaxes the requirements on its output LC filter. Fabricated in a 180nm BCD technology, it can drive 14 W into an 8-Ω load with state-of-the-art performance: -107.8 dB THD+N, 91% peak efficiency, and 7 mA quiescent current. It meets the CISPR 25 Class 5 radiated emission standard with a low-cost 580 kHz LC filter, improving the state-of-the-art by 5.8x. - A 28W -108.9dB/-102.2dB THD/THD+N Hybrid ΔΣ-PWM Class-D Audio Amplifier with 91% Peak Efficiency and Reduced EMI Emission
Shoubhik Karmakar; Huajun Zhang; {Van Veldhoven}, Robert; Lucien Breems; Marco Berkhout; Qinwen Fan; Kofi A. A. Makinwa;
In 2020 IEEE International Solid-State Circuits Conference, ISSCC 2020,
United States, IEEE, pp. 350--352, 2020. Green Open Access added to TU Delft Institutional Repository {\textquoteleft}You share, we take care!{\textquoteright} – Taverne project https://www.openaccess.nl/en/you-share-we-take-care Otherwise as indicated in the copyright section: the publisher i. DOI: 10.1109/ISSCC19947.2020.9063001
Abstract: ...
Class-D amplifiers are often used in high-power audio applications due to their high power efficiency. They typically employ pulse-width modulation (PWM) at a fixed carrier frequency, which may cause electromagnetic interference (EMI). Setting this frequency fPWM) below the AM band (535 to 1605kHz) helps mitigate this, but its harmonics still contain substantial energy and must be filtered out by bulky LC filters with low cut-off frequencies (fc = 20 to 40 kHz), significantly increasing system cost and size. Stability considerations also constrain the amplifier's unity-gain frequency to be < mathrm{f} {mathrm{PWM}}/pi [1], compromising the audio-band loop gain required to suppress output-stage nonlinearity. Setting fPWM above the AM band helps increase fc and allows a higher loop gain [2]. However, this results in narrower pulses at higher power levels (higher modulation index), which cannot be faithfully produced by the output stage, thus exacerbating its non-linearity. Delta-sigma modulation (DeltaSigma M) has fixed pulse widths and does not suffer from these narrow-pulse artefacts. However, the out-of-band noise of 1bit modulators then requires larger LC filters. Moreover, high-order loop filters must be used to achieve sufficient SQNR, which then require additional techniques to maintain stability as the modulation range approaches 100% [3]. - A 6 \textdollar\textbackslashmu\textdollar W 95 dB SNDR Inverter Based \textdollar\textbackslashSigma\textbackslashDelta\textdollar Modulator With Subtractive Dithering and SAR Quantizer
Huajun Zhang; Zhichao Tan; Yi Zhang; Baozhen Chen; Roberto Maurino; Robert Adams; Khiem Nguyen;
{IEEE} Transactions on Circuits and Systems {II}: Express Briefs,
Volume 66, Issue 4, pp. 552--556, April 2019. DOI: 10.1109/tcsii.2018.2869103
document - A 1-V 560-nW SAR ADC With 90-dB SNDR for IoT Sensing Applications
Huajun Zhang; Zhichao Tan; Chao Chu; Baozhen Chen; Hongxing Li; Michael Coln; Khiem Nguyen;
{IEEE} Transactions on Circuits and Systems {II}: Express Briefs,
Volume 66, Issue 12, pp. 1967--1971, December 2019. DOI: 10.1109/tcsii.2019.2898365
document - A 6 $\mu$W 95 dB SNDR Inverter Based $\Sigma\Delta$ Modulator With Subtractive Dithering and SAR Quantizer
Huajun Zhang; Zhichao Tan; Yi Zhang; Baozhen Chen; Roberto Maurino; Robert Adams; Khiem Nguyen;
{IEEE} Transactions on Circuits and Systems {II}: Express Briefs,
Volume 66, Issue 4, pp. 552--556, April 2019. DOI: 10.1109/tcsii.2018.2869103
document - Software-Defined, WiFi and BLE Compliant Back-Channel for Ultra-Low Power Wireless Communication
Huajun Zhang; David D. Wentzloff; Hun Seok Kim;
In 2016 IEEE Global Communications Conference (GLOBECOM),
IEEE, December 2016. DOI: 10.1109/glocom.2016.7842275
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Last updated: 28 Aug 2024
Huajun Zhang
Alumnus- Left in 2024